1. Field of the Invention
The present invention generally relates to a power converting apparatus, and more specifically to a power converting apparatus with dynamical driving adjustment for a power conversion unit using forward, full bridge, half bridge, boost or buck structure and for performing an adjustment process to reduce electromagnetic interference, switching loss and conduction loss by generating a PWM driving signal based on the dynamic state of the switch transistor.
2. The Prior Arts
Lately, power conversion efficiency has been a crucial topic for various electronic products, which need different voltage or current of electric power to normally operation. For instance, integrated circuits (ICs) need 5V or 3V, electric motors need 12V DC power, and lamps of LCD monitors need much higher voltage like 1150V. Thus, it is needed for power converters to meet the requirements of actual applications.
In the prior arts, the scheme of switching power conversion is one of the primary technologies of power conversion, and generally employs the pulsed width modulation (PWM) signal at high frequency to drive the switch transistor (or called driving transistor) to turn on so as to control the current of the inductors (or transformer) connected in series to the switch transistor. When the switch transistor is turned off, the current flowing through the inductor does not stop but gradually changes because the inductor has an effect of sustaining the current to avoid abrupt change. Thus, the inductor is charged or discharged, thereby attaining the purpose of changing the output voltage.
Please refer to FIG. 1 showing the adjustment of driving capability for the switch transistor in the prior arts. The driving signal VD1 is generated by the pre-driver to provide fixed driving capability through a source current/sink current architecture. To adjust driving capability of the switch transistor M1, the first gate resistor RG1, the second gate resistor RG2, the switch diode D1 and the pull-low resistor RGG are used. The first gate resistor RG1 and the second gate resistor RG2 are connected in series, wherein first gate resistor RG1 receives the driving signal VD1 and the second gate resistor RG2 drives the gate G of the switch transistor M1. Additionally, the switch diode D1 and the second gate resistor RG2 are parallel connected, and the pull-low resistor RGG is connected across the gate G of the switch transistor M1 and the ground GND. Thus, to turn on the switch transistor M1, the driving signal VD1 controls the driving current IG1 to flow through the first gate resistor RG1 and the second gate resistor RG2 to the gate G of the switch transistor M1. At this time, the switch diode is reverse biased and turned off, and the voltage of the gate G is increased to turn on the switch transistor M1. To turn off. When the switch transistor M1, the driving signal VD1 is reduced such that the voltage of the gate G drops because of the turn-off current IG2. Specifically, the switch diode is turned on due to forward biasing, and the turn-off current IG2 flows through the switch diode D1 and the second gate resistor RG2, instead of flowing through the first gate resistor Rg1. Additionally, the turn-off current IG2 may flow to the ground GND through the pull-low resistor RGG.
For example, in the turn-off operation of the switch transistor M1, when the first gate resistor RG1 is 0Ω (ohm) and the second gate resistor is 22Ω, the falling time for the drain-source voltage (Vds) of the switch transistor M1 is about 80 ns, and the time for Miller plateau of the gate-source voltage (Vgs) of the switch transistor M1 is about 200 ns. Alternatively, if the first gate resistor RG1 and the second gate resistor are 100Ω (ohm) and 22Ω, respectively, the falling time is prolonged to about 104 ns, and the time for Miller plateau is increased up to about 300 ns. Thus, power conversion efficiency can be increased by reducing the first gate resistor RG1 and the second gate resistor RG2, but EMI issue is still not improved. While EMI can be reduced by increasing the first gate resistor RG1 and the second gate resistor RG2 to prolong the falling time, Miller plateau extends too much and the effective turn-on resistance of the switch transistor M1 can not fast decrease. As a result, power conversion efficiency is adversely affected.
It is obvious that the adjustment function for driving capability in the above traditional scheme is implemented by changing the first gate resistor RG1 and the second gate resistor RG2 to control the turn-off speed for the switch transistor M1. However, one drawback in the prior arts is that the first gate resistor RG1 and the second gate resistor RG2 can not be dynamically changed during switching operation to control the driving signal VD1 to adjust the turn-on time and the turn-off time for the switch transistor M1. While it is possible to reduce switching loss, EMI issue is not solved. In other words, during the turn-on process of the switch transistor M1, when the original state of the switch transistor M1 is turn-off and the turn-on current is zero or approximately zero, fast rising the driving signal VD1 dose not improve switching loss issue, but causes EMI to get worse. Alternatively, when the switch transistor is partly or fully turned on, the turn-on current is considerable, and at this time, slowing down the rising speed and the falling speed of the driving signal VD1 may result in larger power consumption at switching transition.
Therefore, it is greatly needed for the power control apparatus with dynamical adjustment of driving capability, which employs the feedback signal to perform the adjustment process to dynamically adjust the PWM driving signal based on the operation state of the switch transistor and consideration of EMI and switching loss, thereby overcoming the above problems in the prior arts.